Filter options
| Filter | Attenuation | Notes |
|---|---|---|
| Shunt cap | −20 dB/decade | Simple; ESR limits HF performance |
| LC filter | −40 dB/decade | Two-pole, better attenuation |
| π-filter (C-L-C) | −40 dB/decade | Symmetric, common for PSU output |
| Ferrite bead + cap | HF trap | Bead is inductive + lossy at HF — ideal for power rails |
| Common-mode choke | CM noise | Needed for conducted-EMI certification |
| LDO post-reg | 60–80 dB PSRR at LF | Cleanest analog rails |
| Faraday cage | — | Mechanical shielding for sensitive stages |
Bypass cap guidelines
- Place a 100 nF ceramic < 5 mm from every IC power pin.
- Add a 1–10 µF local bulk near each group of ICs.
- Add a 10–100 µF electrolytic or polymer at the board input.
- Don't mix dissimilar ESR caps without checking for anti-resonance notches.
- Use X7R/X5R (not Y5V) for stable capacitance over voltage and temp.
Placement
- Shortest possible loop from cap to IC pin (local GND return).
- Via directly to ground plane — don't snake through other vias.
- For BGA, drop bypass caps on the opposite side directly under the IC.
- Star grounding for analog + digital sections to avoid mixing noise currents.
Notes
- Typical switcher output ripple: 10–50 mV p-p at switching frequency + spikes at switching edges.
- PSRR (power supply rejection ratio) of LDOs drops at high frequency — add filtering upstream for HF noise.
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