Formula
| V_out | = V_in · R₂ / (R₁ + R₂) |
|---|---|
| Ratio | R₂ / (R₁ + R₂) |
| Current | I = V_in / (R₁ + R₂) — constant draw |
| Thévenin R | = R₁ ∥ R₂ |
Common ratios
| Out / In | R₁ : R₂ | Example |
|---|---|---|
| 0.10 | 9 : 1 | 90 kΩ / 10 kΩ → 0.5 V from 5 V |
| 0.25 | 3 : 1 | 30 kΩ / 10 kΩ |
| 0.33 | 2 : 1 | 20 kΩ / 10 kΩ |
| 0.50 | 1 : 1 | 10 kΩ / 10 kΩ → V_in/2 |
| 0.66 | 1 : 2 | 10 kΩ / 20 kΩ |
| 0.75 | 1 : 3 | 10 kΩ / 30 kΩ |
| 0.90 | 1 : 9 | 10 kΩ / 90 kΩ |
Scaling 12 V → 5 V / 3.3 V
| Target | R₁ (top) | R₂ (bottom) | I @ 12 V |
|---|---|---|---|
| 5 V from 12 V | 14 kΩ | 10 kΩ | 500 µA |
| 3.3 V from 12 V | 26.3 kΩ | 10 kΩ | 330 µA |
| 3.3 V from 5 V | 5.1 kΩ | 10 kΩ | 330 µA |
Design rules
- Loading: the load connected to V_out should have impedance ≫ R₂ (10× minimum) — otherwise add a buffer op-amp.
- Current draw: higher R pair saves power but has higher Thévenin impedance (more noise pickup, worse ADC settling).
- ADC divider: R₁ ∥ R₂ should be below the ADC's max source impedance (≈ 10 kΩ on many MCUs).
- Hot tip: round to E24 values and verify the actual ratio — tolerance stacks.
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