DAC Resolution Calculator

Calculate Digital-to-Analog Converter (DAC) step size (LSB), total output levels, and convert between digital codes and output voltages for any bit resolution and reference voltage.

Calculator Electronics Updated Apr 18, 2026
How to Use
  1. Enter DAC resolution in bits (typically 8, 10, 12, 14, 16, or 24).
  2. Enter the reference voltage V<sub>ref</sub> that defines full-scale output.
  3. Convert in either direction: enter a code to see the output voltage, or a voltage to see the equivalent code.
  4. Results: LSB (smallest step), number of levels, max output code, and converted values.
Input
V
V
Presets
Output
LSB
Levels
Code → V
V → Code

Show Work

Enter values to see the DAC math.

Formulas

LSB Size
LSB = Vref / 2N
Smallest step.
Code → Voltage
V = code × LSB
Linear DAC output.
Voltage → Code
code = round(V / LSB)
Clamped to 0..2N−1.
Max Code / Output
2N − 1 → Vref − LSB
Max output is one LSB below full-scale.
Dynamic Range
6.02·N + 1.76 dB
Ideal SNR limit.
Glitch Energy
pV·s at major-carry
Matters at high update rates.

History of the DAC

The earliest digital-to-analog converters predate commercial digital computing — Bell Labs\' 1943 Model II relay computer used relay-selected resistor networks to produce analog voltages. The R-2R ladder architecture still used in many modern DACs was published by Bernard Morgan and Harold Black in 1949; its recursive structure lets any bit contribute a voltage exactly half the next-higher bit with only two resistor values, a manufacturing-friendly trick still relevant today.

Commercial multibit DACs took off with the rise of digital audio in the late 1970s. Philips and Sony jointly developed the 14-bit DAC for the Compact Disc (1982), then 16-bit, then the oversampling 1-bit Σ-Δ DACs that dominate modern audio (Philips SAA7350 in 1988 was an early commercial example). Burr-Brown and Analog Devices drove high-speed DACs for instrumentation and communications; current-steering architectures reach Gsample-per-second rates for direct-digital-synthesis applications.

Modern specialties span an enormous range: 24-bit audio at 192 kHz; 16-bit, 2.5 Gsps current-steering DACs for software-defined radio; ultra-low-power 8-bit R-string DACs for MCU analog output pins; precision 20-bit DACs for voltage references; and integrated Σ-Δ DACs inside every MCU with audio capability. The basic LSB math in this calculator applies to all of them.

About This Calculator

Enter resolution and reference voltage, then optionally convert between code and output voltage. Useful when setting up a DAC in firmware (converting a desired voltage into the code to write), verifying hardware output (converting the code you wrote into the expected voltage), or sizing a reference chip\'s output current drive.

For precision work, also look at DAC datasheet specs for INL/DNL (integral and differential nonlinearity), gain/offset error, settling time, and glitch energy — these determine real-world accuracy beyond the theoretical LSB step. Everything runs client-side; no values leave your browser.

Frequently Asked Questions

What's the difference between DAC and ADC?

A DAC converts a digital code into an analog voltage; an ADC does the reverse. Both follow the same LSB = V<sub>ref</sub>/2<sup>N</sup> math. The difference is direction of data flow and the internal architecture — DACs use R-2R ladders, string DACs, or Σ-Δ modulators; ADCs use SAR, flash, pipelined, or Σ-Δ.

What is glitch energy?

When a DAC transitions between codes (especially at major carries like 7FFF → 8000), internal switches don\'t change simultaneously — the output briefly passes through intermediate values, producing a narrow "glitch" before settling. Glitch energy is measured in pV·s (picovolt-seconds) and matters at high update rates where glitches can exceed the actual signal step.

Monotonic vs linear?

A monotonic DAC guarantees that increasing the input code never decreases output voltage (no "steps backward"). Linearity is tighter: the step size is uniform across all codes. Monotonicity is critical for closed-loop control; linearity matters for precision signal generation.

How does a DAC reconstruct a waveform?

Set a lookup table of codes representing one cycle of the waveform; feed them to the DAC at the sample rate. Example: 100 Hz sine from a 12-bit DAC at 10 ksps requires 100 samples per cycle from a 100-entry table. Output is stepped — add a reconstruction filter (low-pass at fs/2) to smooth the steps into a clean sine.

What's the settling time?

Time from code change to output within ±½ LSB of final value. Modern DACs specify settling time at two accuracies: full-scale step (worst case) and major-carry transition (glitch region). For audio applications, sub-microsecond settling is common; for fast waveform generation, nanosecond settling matters.

Common Use Cases

CD Audio Output

16-bit DAC at 44.1 kHz gives 96 dB dynamic range and 22.05 kHz analog bandwidth. Reconstruction filter needs steep skirt between 22 and 24.1 kHz to eliminate images.

Waveform Generator

12-bit DAC driven by lookup table produces sines, triangles, custom shapes at any frequency below fs/2. 4096-entry table at 1 Msps gives sub-Hz resolution below 244 Hz, coarser above.

Set-Point / Reference

12-bit DAC as a programmable voltage reference for analog test equipment. 0 to 5 V in 1.2 mV steps — perfect for setting trim points remotely.

PWM Replacement

Replacing a PWM-plus-RC-filter with a direct DAC output gives better settling time and zero ripple — important for sensitive analog control loops.

Motor Control Commutation

Three-phase BLDC motor driven by three DAC channels producing sinusoidal phase currents. 12-bit resolution gives smooth torque with minimal commutation ripple.

Last updated: