Differential Termination Calculator
Design differential-pair termination networks for USB, HDMI, LVDS, PCIe: series, parallel, Thevenin, and AC-coupled termination topologies.
How to Use
- Enter differential impedance Z_diff (90, 100, 120 Ω typical).
- Pick termination style: parallel, Thevenin, AC-coupled.
- Tool returns resistor values + power dissipation estimate.
Show Work
Topologies
History of Differential Termination
Differential signaling traces back to Alexander Graham Bell's 1881 twisted-pair telephone patent for common-mode noise cancellation. The modern 100-ohm-differential terminology emerged in the 1980s-90s with LVDS (National Semiconductor, 1994) and PCI / PCIe (2003). AC-coupled termination (series capacitors in each leg) was mandated by PCIe, SATA, and HDMI specs to preserve DC balance regardless of transmitter common-mode bias. Modern PHYs integrate source-matched termination on-chip.
About This Calculator
Enter differential impedance (match to PCB trace), pick topology (parallel for simple termination, Thevenin for common-mode bias, AC-coupled for PCIe/HDMI), common-mode voltage, and signal swing. The tool returns resistor and capacitor values.
For LVDS: simple 100 Ω parallel at receiver. For PCIe: 100 Ω differential + AC-coupling caps (receiver side). For HDMI sink: Thevenin to the chip\'s AVCC rail. Everything runs client-side.
Frequently Asked Questions
Z_diff values?
USB 2.0: 90 Ω. HDMI/PCIe/LVDS/Ethernet: 100 Ω. Some older buses: 120 Ω. Always match PCB trace Z_diff to receiver termination for reflection-free reception.
Parallel vs Thevenin?
Parallel: single resistor across the pair at receiver. Simpler but no common-mode reference. Thevenin (split): two resistors to rails at midpoint; provides common-mode bias. Standard for LVDS without on-chip termination.
AC coupling?
Capacitors in series with the pair block DC while passing AC. Required by PCIe, HDMI (receiver side), and many modern high-speed interfaces. Cap typical 0.1 µF for 10+ Mbps signals.
Common Use Cases
USB 2.0 Termination
On-chip 45Ω to rail in the transmitter + 45Ω on the receive side = 90Ω end-to-end.
PCIe AC-Coupled
100 Ω diff + 0.1 µF series caps = lossless AC coupling required by spec.
LVDS to FPGA
100 Ω Thevenin bias network for FPGA without internal LVDS termination.
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