PWM Duty Cycle

Duty cycle lookup for common PWM resolutions and average voltage vs supply.

Reference Reference Updated Apr 19, 2026
Reference

8-bit PWM (0–255)

Value Duty Avg @ 5 V Avg @ 3.3 V
0 0 % 0 V 0 V
32 12.5 % 0.625 V 0.41 V
64 25 % 1.25 V 0.83 V
96 37.5 % 1.875 V 1.24 V
128 50 % 2.5 V 1.65 V
160 62.5 % 3.125 V 2.06 V
192 75 % 3.75 V 2.48 V
224 87.5 % 4.375 V 2.89 V
255 100 % 5.0 V 3.3 V

10-bit PWM (0–1023)

Value Duty Notes
0 0 %
102 10 %
256 25 %
512 50 %
768 75 %
1023 100 % Full on

Formulas

Duty D
= value / max_count
Avg voltage
= D · (V_high − V_low) + V_low
Top count (timer)
= F_clk / (prescaler × F_pwm)
Usable bits
= log₂(top_count + 1)

Notes

  • At very low duty (< 1% of top), minor clocking errors dominate — use a higher-resolution timer.
  • Motor / LED drivers often have a minimum on-time — below it the output stays off.

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