RC Time Constant Calculator

Michael Faraday's 1837 experiments on electrostatic induction first demonstrated that capacitors charge exponentially through resistance. The formulation v(t) = V·(1 − e^(−t/τ)) with τ = RC came from Heaviside's 1880s circuit analysis, connecting the exponential time dependence to a single parameter — the product of resistance and capacitance. This single equation anchors every transient analysis in circuit theory.

The factor 63.2% at 1τ (exactly 1 − 1/e) is a mathematical convenience — it's where the tangent line at t=0 intersects the final value. At 5τ you've reached 99.3% (within half of 1%), which became the engineering convention for "settled." Precision instrumentation often uses 7τ (99.9%) for ADC input settling before conversion, to stay within ±1 LSB of a 10-bit measurement.

Reset circuits in 1970s MCUs (Intel 8080, Motorola 6800) relied on RC time constants to hold RESET low for several milliseconds after Vcc rose — giving the clock oscillator time to stabilize and internal logic to reach a known state. Modern MCUs include dedicated power-on reset (POR) circuits with brownout detection, but the RC approach still appears in discrete-logic reset ICs (MCP130, TL7705) and in watchdog-timer reset networks.

Enter R and C. The tool returns τ = R·C plus the time-to-percent milestones: 63.2% at 1τ, 86.5% at 2τ, 95% at 3τ, 98.2% at 4τ, 99.3% at 5τ, 99.9% at 7τ. Charging follows v(t) = V·(1 − e^(−t/τ)); discharging follows v(t) = V·e^(−t/τ).

Common applications: debounce networks (τ ≈ 10-50 ms, covering typical contact bounce), RC power-on reset (τ ≈ 100 ms to delay startup past rail settling), op-amp feedback compensation (τ sized to the pole frequency), ADC input filters (τ much shorter than sample period so signal settles between samples), and sample-and-hold droop (τ_hold much longer than conversion time). Everything runs client-side; no values leave your browser.