Eye Diagram Height & Width Calculator

Estimate eye-opening height (voltage margin) and width (timing margin) from signal amplitude, noise, jitter, and ISI. For high-speed serial link budget analysis.

Calculator Electronics Updated Apr 23, 2026
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How to Use
  1. Enter signal amplitude, noise amplitude, total jitter, and data rate.
  2. Tool computes eye height, eye width, and margins against receiver spec.
Input
mV differential
mV
% of amplitude
ps pp
Gbps
Presets
Eye Opening
Eye Height
—mV
Eye Width
—ps
UI
—ps
% UI Open
—%

Show Work

Enter values.

Formulas

UI
UI = 1 / bit rate
200 ps at 5 Gbps.
Eye height
V − 2·ISI − 14·σ_noise
@ BER=1e-12: 7σ each side.
Eye width
UI − TJ_pp
Total jitter eats width.
ISI
Channel loss at Nyquist
Ideal channel: 0 ISI.
Mask margin
(Eye − Mask) / UI
Spec margin.
Crosstalk
Adds to noise σ
NEXT + FEXT contributions.

History of the Eye Diagram

The eye diagram was developed at Bell Labs in the 1960s for characterizing telephone modem performance. Overlaying many unit intervals on an oscilloscope creates the characteristic open-eye pattern; any closure indicates ISI, jitter, or noise. The 1970s brought eye-mask testing for satellite and microwave links; the 1990s extended it to multi-Gbps serial standards (SONET, Fibre Channel). Modern sampling oscilloscopes can display BER-contour plots showing the eye at 1e-6, 1e-9, 1e-12 BER targets - essential for SerDes compliance testing.

About This Calculator

Enter signal amplitude (differential Vpp), noise RMS, ISI closure fraction (estimate from channel loss at Nyquist), total jitter, and data rate. The tool computes unit interval, eye height after subtracting noise margin (14σ for 1e-12 BER) and ISI, eye width after subtracting jitter, and percentage of UI remaining open.

For spec compliance, verify the remaining eye clears the mask polygon (USB 3.x, PCIe, 10GBASE-KR). Use SerDes simulation (ADS, HyperLynx) for accurate channel modeling. Everything runs client-side.

Frequently Asked Questions

What is an eye diagram?

Overlay of many consecutive UIs (Unit Intervals) on scope display. Clean signal forms an open eye shape; impairments close it. Eye height = vertical opening (SNR margin); eye width = horizontal opening (timing margin).

Mask test?

Standards (USB 3.0, PCIe, 10GbE) specify eye-mask polygons that the eye must clear. Compliance testing places the mask on the eye; any trace touching the mask = fail.

Typical closure sources?

Intersymbol Interference (ISI) from channel loss, jitter (both random and deterministic), noise, reflections from impedance discontinuities. Each eats a portion of eye height/width.

Common Use Cases

USB 3.0 Gen1

5 Gbps eye: height > 100 mV, width > 0.5 UI required.

PCIe Gen3

8 Gbps: mask eye-height > 30 mV after equalization.

DDR4 Data Bus

3200 MT/s: tight mask, needs on-die termination + ODT equalization.

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